RISC-V /Debug /Trigger Control (32-bit tcontrol)

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Interpret as Trigger Control (32-bit tcontrol)

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (disabled)mte 0 (mpte)mpte

mte=disabled

Description

This optional register is only accessible in M-mode and Debug Mode and provides various control bits related to triggers.

Fields

mte

M-mode trigger enable field.

0 (disabled): Triggers with action=0 do not match/fire while the hart is in M-mode.

1 (enabled): Triggers do match/fire while the hart is in M-mode.

mpte

M-mode previous trigger enable field.

{tcontrol-mpte} and {tcontrol-mte} provide one solution to a problem regarding triggers with action=0 firing in M-mode trap handlers. See nativetrigger for more details.

When any trap into M-mode is taken, {tcontrol-mpte} is set to the value of {tcontrol-mte}.

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